Thank you to the following supporters of ICASSP 2007
The following workshops are being held in conjunction with ICASSP 2007. There is no cost to attend, however, in order to plan appropriately, online registration is required!
Sunday, April 15, 08:30 - 17:30, Room 301A
| Workshop Description [PDF] | (Online Workshop Registration Closed) |
This one day workshop is focused on Global Earth Observation System of Systems (GEOSS) engineering and implementation of the GEOSS information infrastructure. The workshop will provide a forum for discussing the development and operational issues of an advanced global information system for supporting national, regional and global decisions impacting society. One of its goals will be to connect the signal processing and systems communities to GEOSS in the context of engineering needs and related user issues.
Speakers include: A.S. Willsky (MIT), A. Hero (U. Michigan), P. Gartz (Boeing), W. Christian (USGS), G. Weets (EC DG), S. Cox (CSIRO, OGC), M. Butterfield (Boeing), C. Hood (Raytheon), J. Martin (INCOSE), D. Havlik (SANY), L. Bruzzzone (U. Trento), R. Shibasaki (Y. Tokyo), J.A. Rogers (Google Earth), B. Gail (Microsoft Vexcel)
Tuesday, April 17, 10:30 to 12:30, Room 301B
| Workshop Description | (Online Workshop Registration Closed) |
There is a wide range of cost/performance tradeoffs for implementing DSP algorithms into silicon, especially when targeting diverse technologies like FPGAs and ASICs. Finding the optimal implementation usually involves exploring parallel vs. serial architectures and will be highly dependent on the available resources, speed, and architecture of the technology. This session will explore how some of the commmonly used optimizations work and how they can be applied automatically to high-level algorithm models using Synplicity's Synplify DSP tool. The seminar will include examples in wireless communications and will benefit engineers who are interested in:
Wednesday, April 18, 09:30 - 11:30, Room 301B
| Workshop Description | (Online Workshop Registration Closed) |
In this presentation, you will learn how to use new capabilities of MATLAB® and Simulink® to model, simulate and implement modern communications and video processing systems. We will demonstrate how MATLAB and Simulink enable you to study and model design tradeoffs, performance, and rate-distortion profiles of a wireless communication system. We will also examine steps involved with the design of a fixed-point video processing system. We will cover all stages of the workflow from modeling and simulation, converting the design from a floating-point to a fixed-point representation, automatically generating C code or VHDL/Verilog code for deployment onto DSP or FPGA hardware and verifying the design through real-time co-simulation on the hardware platform.
Friday, April 20 and Saturday, April 21, 09:00 - 17:00 (both days) at University of Hawaii, Holmes Hall Room 387
| Workshop Description | (Online Workshop Registration Closed) |
This is a two day XUP Workshop offering hands-on training FREE of charge. The University of Hawaii will be providing the facility and the computers. Transportation to University of Hawaii is not provided; Attendees are responsible for their own transportation.
Attendees receive $1,500 worth of technical training plus over $2,500 worth of software Tools for attending the workshop.
XUP will be providing the certified trainer, boards and software for the workshop, materials, and catering for the two days.
The DSP Design Flow workshop provides an introduction to the advanced tools you need to design and implement DSP algorithms targeting FPGAs. This intermediate workshop in implementing DSP functions focuses on learning how to use System Generator for DSP, as well as HDL design flow, CORE Generator software, and design implementation tools. Through hands-on exercises, you will implement a design from algorithm concept to verification.